IBM and NVIDIA jointly developed one billion billion times Supercomputer

[xiaoxiao]

ISC 15 in Frankfurt, Germany on an international computer conference, IBM, NVIDIA and the US Department of Energy (DOE) under the Oak Ridge National Laboratory, Lawrence Livermore National Laboratories supercomputer experimental center of excellence, joint development of a new generation of HPC computer, will use IBM's Power processors and NVIDIA's Teslak accelerator, at least one billion floating-point performance million times, up to a maximum 3 billion billion times, is currently ranked first in the TOP500 Chinese Tianhe-2 Performance 2-6 times.

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US Department of Energy and IBM, NVIDIA jointly develop the next generation of HPC in fact, had announced in November last year, the Department of Energy's $ 320 million initial investment to the companies, asking them to two Department of Energy's national laboratories have each developed a HPC, codenamed Summit of HPC will be installed at Oak Ridge National Park, the floating point performance of up to 150-300 PTFLOPS (PTFLOPS = 1000000000000000 times), and the code of HPC Sierra will be installed in the Lawrence Livermore National Laboratory This station HPC performance is slightly lower, but also to achieve 100PTFLOPS (10 quadrillion times), almost five consecutive currently in China TOP500 Milky Way twice No.2 latter theory floating point performance is 55PTFLOPS, Linapack peak Performance is 33.9PTFLOPS.

Sierra Summit, and will be designed with heterogeneous processor + coprocessor, the main processor is IBM's Power 8 (also said to be Power 9), the coprocessor is NVIDIA's Tesla accelerator, specifically Volta architecture a new generation of GPU, but has now been postponed Volta architecture, NVIDIA will launch after Maxwell GPU architecture make the transition Pascal, Pascal also supports the original architecture Volta stack memory, so use this two HPC Accelerator is also possible that Pascal architecture chips.

In addition, the two HPC will also use IBM, NVIDIA developed NVLink high-speed interconnect technology, which aims to break the bandwidth bottleneck communication between GPU and CPU, GPU and GPU, wherein the multi-card system bandwidth will It is now five times the PCI-E channels (from 1GB / s upgrade to 5GB / s). However, according to NVIDIA's description, this technique requires CPU hardware support, but it is certain that the introduction of temporary CAPI (consistency associated processor interface) is the next generation of IBM Power processors will be the first to support this technology.

IBM, NVIDIA HPC responsible for the development of these two deliveries scheduled for completion in 2017, 2018 began formal operation, if China will take no more powerful HPC, then the Milky Way No. 2 TOP500 championship position is certainly retain his job. But China is currently also developing one billion billion times supercomputer, to look at their dawn under Chinese Academy of Sciences in the development of independent technical dawn 7000, two years before.